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» Layout synthesis for datapath designs
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ISPD
1999
ACM
128views Hardware» more  ISPD 1999»
14 years 27 days ago
Transistor level micro-placement and routing for two-dimensional digital VLSI cell synthesis
There is an increasing need in modern VLSI designs for circuits implemented in high-performance logic families such as Cascode Voltage Switch Logic, Pass Transistor Logic, and dom...
Michael A. Riepe, Karem A. Sakallah
ISCAS
2006
IEEE
113views Hardware» more  ISCAS 2006»
14 years 2 months ago
Low power state-parallel relaxed adaptive Viterbi decoder design and implementation
Abstract— In this paper, we present an algorithm/architecturelevel design solution for implementing state-parallel adaptive Viterbi decoders that, compared with their Viterbi cou...
Fei Sun, Tong Zhang
ASPDAC
2007
ACM
116views Hardware» more  ASPDAC 2007»
14 years 17 days ago
Safe Delay Optimization for Physical Synthesis
-- Physical synthesis is a relatively young field in Electronic Design Automation. Many published optimizations for physical synthesis end up hurting the final result, often by neg...
Kai-Hui Chang, Igor L. Markov, Valeria Bertacco
VLSID
2006
IEEE
183views VLSI» more  VLSID 2006»
14 years 2 months ago
Design Challenges for High Performance Nano-Technology
This tutorial present the key aspects of design challenges and its solutions that are being experienced in VLSI design in the era of nano technology. The focus will be on design c...
Goutam Debnath, Paul J. Thadikaran
DAC
2007
ACM
14 years 15 days ago
Integrated Droplet Routing in the Synthesis of Microfluidic Biochips
Microfluidic biochips are revolutionizing many areas of biochemistry and biomedical sciences. Several synthesis tools have recently been proposed for the automated design of bioch...
Tao Xu, Krishnendu Chakrabarty