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ASPDAC
2004
ACM
96views Hardware» more  ASPDAC 2004»
13 years 11 months ago
Rate analysis for streaming applications with on-chip buffer constraints
While mapping a streaming (such as multimedia or network packet processing) application onto a specified architecture, an important issue is to determine the input stream rates tha...
Alexander Maxiaguine, Simon Künzli, Samarjit ...
ICCAD
2007
IEEE
151views Hardware» more  ICCAD 2007»
13 years 11 months ago
A design flow dedicated to multi-mode architectures for DSP applications
This paper addresses the design of multi-mode architectures for digital signal processing applications. We present a dedicated design flow and its associated high-level synthesis t...
Cyrille Chavet, Caaliph Andriamisaina, Philippe Co...
DSD
2010
IEEE
161views Hardware» more  DSD 2010»
13 years 7 months ago
Design of Trace-Based Split Array Caches for Embedded Applications
—Since many embedded systems execute a predefined set of programs, tuning system components to application programs and data is the approach chosen by many design techniques to o...
Alice M. Tokarnia, Marina Tachibana
ICCD
2008
IEEE
192views Hardware» more  ICCD 2008»
14 years 4 months ago
Energy-aware opcode design
— Embedded processors are required to achieve high performance while running on batteries. Thus, they must exploit all the possible means available to reduce energy consumption w...
Balaji V. Iyer, Jason A. Poovey, Thomas M. Conte
IUI
2005
ACM
14 years 1 months ago
Building intelligent shopping assistants using individual consumer models
This paper describes an Intelligent Shopping Assistant designed for a shopping cart mounted tablet PC that enables individual interactions with customers. We use machine learning ...
Chad M. Cumby, Andrew E. Fano, Rayid Ghani, Marko ...