233 search results - page 20 / 47 » Logic design for low-voltage low-power CMOS circuits |
ISLPED
1995
ACM
14 years 4 days ago
1995
ACM
DAC
2001
ACM
14 years 9 months ago
2001
ACM
This paper presents the design and evaluation of an 8-bit adiabatic multiplier. Both the multiplier core and its built-in self-test logic have been designed using a true single-ph...
ISLPED
1998
ACM
14 years 25 days ago
1998
ACM
Adiabatic logic promises extremely low power consumption for those applications where slower clock rates are acceptable. However, there have been very few adiabatic memory designs...
ATS
2000
IEEE
14 years 1 months ago
2000
IEEE
Because domino logic design offers smaller area and faster delay than conventional CMOS design, it is very popular in the high-performance processor design. However, domino logic ...
DAC
2006
ACM
14 years 9 months ago
2006
ACM
Designing an energy efficient power gating structure is an important and challenging task in Multi-Threshold CMOS (MTCMOS) circuit design. In order to achieve a very low power des...