233 search results - page 26 / 47 » Logic design for low-voltage low-power CMOS circuits |
GLVLSI
2006
IEEE
14 years 2 months ago
2006
IEEE
As CMOS devices and operating voltages are scaled down, noise and defective devices will impact the reliability of digital circuits. Probabilistic computing compatible with CMOS o...
FPGA
2006
ACM
14 years 8 days ago
2006
ACM
This paper presents experimental measurements of the differences between a 90nm CMOS FPGA and 90nm CMOS Standard Cell ASICs in terms of logic density, circuit speed and power cons...
PATMOS
2004
Springer
14 years 2 months ago
2004
Springer
The main result is the development, and delay comparison based on Logical Effort, of a number of high speed circuits for common arithmetic and related operations using threshold l...
SBCCI
2004
ACM
14 years 2 months ago
2004
ACM
This paper presents an approach for simulation of mixed analog-digital CMOS integrated circuits, aiming at estimating crosstalk effects due to current pulses drawn from voltage s...
EH
2003
IEEE
14 years 1 months ago
2003
IEEE
No silicon fabrication and characterization of circuits with topologies designed by evolution has been done before, leaving open questions about the feasibility of the evolutionar...