980 search results - page 113 / 196 » Logical Testing |
COMPSAC
2003
IEEE
14 years 2 months ago
2003
IEEE
This paper explores how to characterise security properties of software components, and how to reason about their suitability for a trustworthy compositional contract. Our framewo...
DATE
2003
IEEE
14 years 2 months ago
2003
IEEE
In modern SoCs, embedded memories occupy the largest part of the chip area and include an even larger amount of active devices. As memories are designed very tightly to the limits...
DFT
2003
IEEE
14 years 2 months ago
2003
IEEE
Safety-critical embedded systems often operate in harsh environmental conditions that necessitate fault-tolerant computing techniques. Many safety-critical systems also execute re...
DATE
1999
IEEE
14 years 1 months ago
1999
IEEE
This paper presents a new Design for Testability (DFT) technique for Current-Mode Logic (CML) circuits. This new technique, with little overhead, using built-in detectors, monitor...
ITC
1998
IEEE
14 years 1 months ago
1998
IEEE
We investigate defects in CMOS domino gates and derive the test conditions for them. Very-Low-Voltage Testing can improve the defect coverage, which we define as the maximum detec...