980 search results - page 14 / 196 » Logical Testing |
FATES
2006
Springer
13 years 11 months ago
2006
Springer
Abstract. We propose a syntax-driven test generation technique to auly derive abstract test cases from a set of requirements expressed in a linear temporal logic. Assuming that an ...
ICST
2008
IEEE
14 years 1 months ago
2008
IEEE
If access control policy decision points are not neatly separated from the business logic of a system, the evolution of a security policy likely leads to the necessity of changing...
DATE
2007
IEEE
14 years 1 months ago
2007
IEEE
This paper proposes an efficient test methodology to test switches in a Network-on-Chip (NoC) architecture. A switch in an NoC consists of a number of ports and a router. Using th...
ICCD
2003
IEEE
14 years 23 days ago
2003
IEEE
Excessive switching activity during shift cycles in scan-based cores imposes considerable test power challenges. To ensure rapid and reliable test of SOCs, we propose a scan chain...
DATE
1999
IEEE
13 years 11 months ago
1999
IEEE
The design and architectures of a microcode-based memory BIST and programmable FSM-based memory BIST unit are presented. The proposed microcode-based memory BIST unit is more e ci...