3 search results - page 1 / 1 » Low Power Illinois Scan Architecture for Simultaneous Power ... |
DATE
2008
IEEE
14 years 1 months ago
2008
IEEE
We present Low Power Illinois scan architecture (LPILS) to achieve power dissipation and test data volume reduction, simultaneously. By using the proposed scan architecture, dynam...
ISQED
2010
IEEE
14 years 16 days ago
2010
IEEE
— This paper proposes a two-dimensional scan shift control concept for multiple scan chain design. Multiple scan chain test scheme provides very low scan power by skipping many l...
VTS
2005
IEEE
14 years 1 months ago
2005
IEEE
This paper presents a test architecture that addresses multiple problems faced in digital IC testing. These problems are test data volume, test application time, test power consum...