Sciweavers

331 search results - page 15 / 67
» Low power implementation of a turbo-decoder on programmable ...
Sort
View
DAC
2005
ACM
15 years 7 months ago
Sign bit reduction encoding for low power applications
This paper proposes a low power technique, called SBR (Sign Bit Reduction) which may reduce the switching activity in multipliers as well as data buses. Utilizing the multipliers ...
M. Saneei, Ali Afzali-Kusha, Zainalabedin Navabi
ISCAS
2007
IEEE
108views Hardware» more  ISCAS 2007»
16 years 4 days ago
A Low Power Digital Baseband for Wireless Endoscope Capsule
— A design of low power digital baseband for wireless endoscope capsule is presented. The key design issues involved in this IC are discussed, including implementation of communi...
Xinkai Chen, Guolin Li, Xiang Xie, XiaoWen Li, Zhi...
HPCA
2009
IEEE
16 years 6 months ago
Bridging the computation gap between programmable processors and hardwired accelerators
New media and signal processing applications demand ever higher performance while operating within the tight power constraints of mobile devices. A range of hardware implementatio...
Kevin Fan, Manjunath Kudlur, Ganesh S. Dasika, Sco...
ASAP
2007
IEEE
111views Hardware» more  ASAP 2007»
16 years 6 days ago
Entropy Coding on a Programmable Processor Array for Multimedia SoC
Entropy encoding and decoding is a crucial part of any multimedia system that can be highly demanding in terms of computing power. Hardware implementation of typical compression a...
Roberto R. Osorio, Javier D. Bruguera
TVLSI
2010
15 years 16 days ago
A Low-Power DSP for Wireless Communications
This paper proposes a low-power high-throughput digital signal processor (DSP) for baseband processing in wireless terminals. It builds on our earlier architecture--Signal processi...
Hyunseok Lee, Chaitali Chakrabarti, Trevor N. Mudg...