1004 search results - page 33 / 201 » Low power methodology and design techniques for processor de... |
DAC
1998
ACM
14 years 9 months ago
1998
ACM
Increasingly popular reuse-based design paradigms create a pressing need for authorship enforcement techniques that protect the intellectual property rights of designers. We devel...
DATE
2004
IEEE
14 years 7 days ago
2004
IEEE
In this paper, we present a technique to design and verify the Look-Aside (LA-1) Interface standard used in network processors. Our design flow includes several refinements starti...
JILP
2002
13 years 8 months ago
2002
As microprocessor designs continue to evolve, many optimizations reach a point of diminishing returns. We introduce HLS, a hybrid processor simulator which uses statistical models...
VLSID
2002
IEEE
14 years 8 months ago
2002
IEEE
Critical issues in designing a high speed, low power static RAM in deep submicron technologies are described along with the design techniques used to overcome them. With appropria...
ITC
1998
IEEE
14 years 22 days ago
1998
IEEE
New methodologies based on functional testing and built-in self-test can narrow the gap between necessary solutions and existing techniques for processor validation and testing. W...