308 search results - page 15 / 62 » Macromodeling of analog circuits for hierarchical circuit de... |
DATE
2010
IEEE
14 years 15 days ago
2010
IEEE
—This paper proposes a circuit optimization approach that can ease the computational burden on the simulation-based circuit optimizers by leveraging simple design equations that ...
ICCAD
2001
IEEE
14 years 4 months ago
2001
IEEE
: This paper describes ASF, a novel cell-level analog synthesis framework that can size and bias a given circuit topology subject to a set of performance objectives and a manufactu...
DATE
2003
IEEE
14 years 21 days ago
2003
IEEE
This paper presents a new technique for automatically creating analog circuit models. The method extracts - from trained neural networks - piecewise linear models expressing the l...
VLSID
2002
IEEE
14 years 7 months ago
2002
IEEE
Various calculation of matrices and vectors has been used in many digital signal processing systems. Although the calculation simply repeats multiplication and addition, the reite...
ASPDAC
2007
ACM
13 years 11 months ago
2007
ACM
A new graph reduction approach to symbolic circuit analysis is developed in this paper. A Binary Decision Diagram (BDD) mechanism is formulated, together with a specially designed ...