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ISCAS
2007
IEEE
112views Hardware» more  ISCAS 2007»
14 years 1 months ago
A New Statistical Approach for Glitch Estimation in Combinational Circuits
— Low-power consumption has become a highly important concern for synchronous standard-cell design, and consequently mandates the use of low-power design methodologies and techni...
Ahmed Sayed, Hussain Al-Asaad
ISLPED
1996
ACM
110views Hardware» more  ISLPED 1996»
13 years 11 months ago
Statistical estimation of average power dissipation in CMOS VLSI circuits using nonparametric techniques
In this paper, we present a new statistical technique for estimation of average power dissipation in digital circuits. Present statistical techniques estimate the average power ba...
Li-Pen Yuan, Chin-Chi Teng, Sung-Mo Kang
MJ
2007
87views more  MJ 2007»
13 years 6 months ago
Using SAT-based techniques in power estimation
Recent algorithmic advances in Boolean satisfiability (SAT), along with highly efficient solver implementations, have enabled the successful deployment of SAT technology in a wi...
Assim Sagahyroon, Fadi A. Aloul
VLSID
2007
IEEE
142views VLSI» more  VLSID 2007»
14 years 7 months ago
Controllability-driven Power Virus Generation for Digital Circuits
The problem of peak power estimation in CMOS circuits is essential for analyzing the reliability and performance of circuits at extreme conditions. The Power Virus problem involves...
K. Najeeb, Karthik Gururaj, V. Kamakoti, Vivekanan...
DAC
1998
ACM
14 years 8 months ago
Maximum Power Estimation Using the Limiting Distributions of Extreme Order Statistics
In this paper we present a statistical method for estimating the maximum power consumption in VLSI circuits. The method is based on the theory of extreme order statistics applied ...
Qinru Qiu, Qing Wu, Massoud Pedram