4396 search results - page 14 / 880 » Measuring the Architecture Design Process |
ETS
2006
IEEE
14 years 1 months ago
2006
IEEE
This paper presents a new on-chip time measurement architecture which is based on the Timeto-Digital Conversion (TDC) method that is capable of achieving a timing resolution of te...
SIGMETRICS
2012
ACM
12 years 7 days ago
2012
ACM
Latency has become an important metric for network monitoring since the emergence of new latency-sensitive applications (e.g., algorithmic trading and high-performance computing)....
CORR
2008
Springer
13 years 10 months ago
2008
Springer
In this paper, an architecture designed for electrical measurement of the quality factor of MEMS resonators is proposed. An estimation of the measurement performance is made using...
DATE
2009
IEEE
14 years 4 months ago
2009
IEEE
Reconfigurable Architectures are good candidates for application accelerators that cannot be set in stone at production time. FPGAs however, often suffer from the area and perfor...
ITC
2003
IEEE
14 years 3 months ago
2003
IEEE
A BIST method measures accumulated jitter over N periods and requires no external references. Simulation using a 0.25um process shows a 625MHz - 1GHz input range with resolution o...