102 search results - page 3 / 21 » Memory Interfacing and Instruction Specification for Reconfi... |
136
Voted
DATE
2003
IEEE
15 years 9 months ago
2003
IEEE
Novel reconfigurable computing architectures exploit the inherent parallelism available in many signalprocessing problems. These architectures often consist of networks of compute...
124
Voted
DAC
2004
ACM
16 years 4 months ago
2004
ACM
Reconfigurable Systems-on-Chip (SoCs) on the market consist of full-fledged processors and large Field-Programmable Gate-Arrays (FPGAs). The latter can be used to implement the sy...
133
Voted
DAC
2009
ACM
16 years 4 months ago
2009
ACM
Energy consumption is of significant concern in battery operated embedded systems. In the processors of such systems, the instruction cache consumes a significant fraction of the ...
158
Voted
DAC
2000
ACM
16 years 4 months ago
2000
ACM
In this paper, we present a case study for the design, programming and usage of a reconfigurable system-on-chip, MorphoSys, which is targeted at computation-intensive applications...
137
Voted
DATE
2002
IEEE
15 years 8 months ago
2002
IEEE
In this paper, we investigate the benefits of a flexible, application-specific instruction set by adding a run-time Reconfigurable Functional Unit (RFU) to a VLIW processor. Preli...