2078 search results - page 14 / 416 » MetaCores: Design and Optimization Techniques |
DATE
2005
IEEE
14 years 2 months ago
2005
IEEE
In this paper we present arithmetic real-coded variation operators tailored for time slot and turn optimization on TDMA-scheduled resources with evolutionary algorithms. Our opera...
GLVLSI
2009
IEEE
14 years 3 months ago
2009
IEEE
The interconnection delay of pre-fabricated design style dominates circuit delay due to the heavily downstream capacitance. Buffer insertion is a widely used technique to split o...
VLSID
2003
IEEE
14 years 8 months ago
2003
IEEE
This paper quantifies the performance of typical functional unit interface designs in single-chip systems. We introduce a specific equation to guide the design of optimal module i...
ICCAD
1997
IEEE
14 years 2 hour ago
1997
IEEE
The relentless push for high performance in custom digital circuits has led to renewed emphasis on circuit optimization or tuning. The parameters of the optimization are typically...
ASPDAC
2008
ACM
13 years 10 months ago
2008
ACM
- In multi-layered power/ground (P/G) networks, to connect the whole network together, vertical vias are usually placed at intersections between metal wires of adjoining layers. In...