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» Methods for true power minimization
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BMCBI
2010
119views more  BMCBI 2010»
13 years 7 months ago
A comparison of internal validation techniques for multifactor dimensionality reduction
Background: It is hypothesized that common, complex diseases may be due to complex interactions between genetic and environmental factors, which are difficult to detect in high-di...
Stacey J. Winham, Andrew J. Slater, Alison A. Mots...
ASPDAC
2007
ACM
110views Hardware» more  ASPDAC 2007»
13 years 11 months ago
Fast Placement Optimization of Power Supply Pads
Power grid networks in VLSI circuits are required to provide adequate input supply to ensure reliable performance. In this paper, we propose algorithms to find the placement of pow...
Yu Zhong, Martin D. F. Wong
DAC
1997
ACM
13 years 12 months ago
Architectural Exploration Using Verilog-Based Power Estimation: A Case Study of the IDCT
We describe an architectural design space exploration methodology that minimizes the energy dissipation of digital circuits. The centerpiece of our methodology is a Verilog-based ...
Thucydides Xanthopoulos, Yoshifumi Yaoi, Anantha C...
DAC
2005
ACM
13 years 9 months ago
Multi-frequency wrapper design and optimization for embedded cores under average power constraints
This paper presents a new method for designing test wrappers for embedded cores with multiple clock domains. By exploiting the use of multiple shift frequencies, the proposed meth...
Qiang Xu, Nicola Nicolici, Krishnendu Chakrabarty
ISQED
2005
IEEE
95views Hardware» more  ISQED 2005»
14 years 1 months ago
Power Supply Noise-Aware Scheduling and Allocation for DSP Synthesis
As technology scales down, power supply noise is becoming a performance and reliability bottleneck in modern VLSI. We propose a power supply noise-aware design methodology for hig...
Dongku Kang, Yiran Chen, Kaushik Roy