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MICRO
2005
IEEE
126views Hardware» more  MICRO 2005»
14 years 3 months ago
Cost Sensitive Modulo Scheduling in a Loop Accelerator Synthesis System
Scheduling algorithms used in compilers traditionally focus on goals such as reducing schedule length and register pressure or producing compact code. In the context of a hardware...
Kevin Fan, Manjunath Kudlur, Hyunchul Park, Scott ...
VISUALIZATION
2005
IEEE
14 years 3 months ago
Topology-driven Surface Mappings with Robust Feature Alignment
Topological concepts and techniques have been broadly applied in computer graphics and geometric modeling. However, the homotopy type of a mapping between two surfaces has not bee...
Christopher Carner, Miao Jin, Xianfeng Gu, Hong Qi...
VISUALIZATION
2005
IEEE
14 years 3 months ago
Distributed Data Management for Large Volume Visualization
We propose a distributed data management scheme for large data visualization that emphasizes efficient data sharing and access. To minimize data access time and support users wit...
Jinzhu Gao, Jian Huang, C. Ryan Johnson, Scott Atc...
ACMSE
2005
ACM
14 years 3 months ago
The bipartite clique: a topological paradigm for WWWeb user search customization
Web user search customization research has been fueled by the recognition that if the WWW is to attain to its optimal potential as an interactive medium the development of new and...
Brenda F. Miles, Vir V. Phoha
ISLPED
2005
ACM
102views Hardware» more  ISLPED 2005»
14 years 3 months ago
Snug set-associative caches: reducing leakage power while improving performance
As transistors keep shrinking and on-chip data caches keep growing, static power dissipation due to leakage of caches takes an increasing fraction of total power in processors. Se...
Jia-Jhe Li, Yuan-Shin Hwang