48 search results - page 5 / 10 » Mixed-Vth (MVT) CMOS Circuit Design Methodology for Low Powe... |
DAC
1997
ACM
13 years 10 months ago
1997
ACM
Multi-threshold CMOS is an increasingly popular circuit approach that enables high performance and low power operation. However, no methodologies have been developed to size the h...
GLVLSI
2010
IEEE
13 years 11 months ago
2010
IEEE
Graphene nanoribbon tunneling FETs (GNR TFETs) are promising devices for post-CMOS low-power applications because of the low subthreshold swing, high Ion/Ioff, and potential for l...
DAC
2003
ACM
14 years 7 months ago
2003
ACM
In this work, we report on an unprecedented design where digital, analog, and MEMS technologies are combined to realize a generalpurpose single-chip CMOS microsystem. The converge...
ISQED
2009
IEEE
14 years 1 months ago
2009
IEEE
- Designing a power-gating structure with high performance in the active mode and low leakage and short wakeup time during standby mode is an important and challenging task. This p...
DATE
2008
IEEE
14 years 1 months ago
2008
IEEE
This paper presents the design and the laboratory results of an integrated half-bridge driver for power electronic systems in a 0.35 µm Bipolar CMOS DMOS (BCD) technology. The pr...