78 search results - page 7 / 16 » Modeling QCA for area minimization in logic synthesis |
ICCAD
1996
IEEE
14 years 23 hour ago
1996
IEEE
We describe an algorithm for the synthesis and optimization of interface circuits for embedded system components such as microprocessors, memory ASIC, and network subsystems with ...
ISPD
2004
ACM
14 years 1 months ago
2004
ACM
Considering the voltage drop constraint over a distributed model for power/ground (P/G) network, we study the following two problems for physical synthesis of sleep transistors: t...
ISMVL
1999
IEEE
14 years 4 days ago
1999
IEEE
In this paper, the theory of information relationships and relationship measures is considered and its application to logic design is discussed. This theory makes operational the ...
ICCAD
1998
IEEE
14 years 3 days ago
1998
IEEE
The intellectual property (IP) business model is vulnerable to a number of potentially devastating obstructions, such as misappropriation and intellectual property fraud. We propo...
DATE
2009
IEEE
14 years 2 months ago
2009
IEEE
—We investigate restructuring techniques based on decomposition/factorization, with the objective to move critical signals toward the output while minimizing area. A specific ap...