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» Multi-Million Gate FPGA Physical Design Challenges
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ARC
2009
Springer
134views Hardware» more  ARC 2009»
14 years 1 months ago
A HyperTransport 3 Physical Layer Interface for FPGAs
Abstract. This paper presents the very first implementation of a HyperTransport 3 physical layer interface for Field Programmable Gate Arrays. HyperTransport is a low latency, high...
Heiner Litz, Holger Fröning, Ulrich Brün...
TVLSI
1998
83views more  TVLSI 1998»
13 years 8 months ago
Low overhead fault-tolerant FPGA systems
— Fault-tolerance is an important system metric for many operating environments, from automotive to space exploration. The conventional technique for improving system reliability...
John Lach, William H. Mangione-Smith, Miodrag Potk...
ICCAD
2010
IEEE
191views Hardware» more  ICCAD 2010»
13 years 2 months ago
Current Shaping and Multi-thread Activation for Fast and Reliable Power Mode Transition in Multicore Designs
Power gating has been widely adopted in multicore designs. The design of fast and reliable power mode transition for per-core power gating remains a challenging problem. This paper...
Hao Xu Ranga Vemuri Wen-Ben Jone
GLVLSI
2009
IEEE
170views VLSI» more  GLVLSI 2009»
14 years 11 days ago
Physical unclonable function and true random number generator: a compact and scalable implementation
Physical Unclonable Functions (PUF) and True Random Number Generators (TRNG) are two very useful components in secure system design. PUFs can be used to extract chip-unique signat...
Abhranil Maiti, Raghunandan Nagesh, Anand Reddy, P...
FPL
2010
Springer
139views Hardware» more  FPL 2010»
13 years 6 months ago
Mapping Multiple Multivariate Gaussian Random Number Generators on an FPGA
A Multivariate Gaussian random number generator (MVGRNG) is an essential block for many hardware designs, including Monte Carlo simulations. These simulations are usually used in a...
Chalermpol Saiprasert, Christos-Savvas Bouganis, G...