575 search results - page 102 / 115 » Multi-Valued Logic Synthesis |
ASAP
2009
IEEE
14 years 7 months ago
2009
IEEE
—This paper describes the acceleration of virtual ecology models using field-programmable gate arrays (FPGAs). Our approach targets models generated by the Virtual Ecology Workb...
ICCD
2007
IEEE
14 years 6 months ago
2007
IEEE
We have developed a new statistical timing analysis approach that does not impose any assumptions on the nature of manufacturing variability and takes into account an arbitrary mo...
ICCAD
2008
IEEE
14 years 6 months ago
2008
IEEE
Functional decomposition is a fundamental operation in logic synthesis. Prior BDD-based approaches to functional decomposition suffer from the memory explosion problem and do not...
ICCAD
2006
IEEE
14 years 6 months ago
2006
IEEE
In a synchronous finite state machine (FSM), huge current peaks are often observed at the moment of state transition. Previous low power state encoding algorithms focus on the red...
ICCAD
2004
IEEE
14 years 6 months ago
2004
IEEE
— This paper presents two contributions. The first is an incremental placement algorithm for placement-aware logic synthesis along with a proof of optimality. The algorithm can ...