980 search results - page 23 / 196 » Novel Test Pattern Generators for Pseudo-Exhaustive Testing |
ET
2002
13 years 9 months ago
2002
In this paper we present a new reseeding technique for test-per-clock test pattern generation suitable for at-speed testing of circuits with random-pattern resistant faults. Our te...
DATE
1999
IEEE
14 years 1 months ago
1999
IEEE
In this paper we propose an efficient transient test generation method to comprehensively test analog circuits using minimum test time. A divide and conquer strategy is formulated...
VTS
1997
IEEE
14 years 1 months ago
1997
IEEE
A new approach for testing the bistable elements (latches and flip-flops) in scan chain circuits is presented. In this approach, we generate test patterns that apply a checking ex...
ATS
2000
IEEE
14 years 1 months ago
2000
IEEE
We present a new pseudorandom testing algorithm for the Built-In Self-Test (BIST) of DRAM. In this algorithm, test patterns are complemented to generate state-transitions that are...
TAICPART
2010
IEEE
13 years 7 months ago
2010
IEEE
Abstract. With pairwise testing, the test model is a list of N parameters. Each test case is an N-tuple; the test space is the cross product of the N parameters. A pairwise test is...