In this paper, we present the design of a P4 (Power-PerformanceProcess-Parasitic) aware voltage controlled oscillator (VCO) at nanoCMOS technologies. Through simulations, we have ...
- In low temperature polycrystalline silicon (LTPS) based display technologies, the electrical parameter variations in thin film transistors (TFTs) caused by random grain boundarie...
Increasing source voltage (Source-Biasing) is an efficient technique for reducing gate and sub-threshold leakage of SRAM arrays. However, due to process variation, a higher source...
Swaroop Ghosh, Saibal Mukhopadhyay, Kee-Jong Kim, ...
Due to the inherent nature of heat flow in 3D integrated circuits, stacked dies exhibit a wide range of thermal characteristics. The strong dependence of leakage with temperature...
Clock network is a vulnerable victim of variations as well as a main power consumer in many integrated circuits. Recently, link-based non-tree clock network attracts people's...