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» On modeling top-down VLSI design
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GLVLSI
2007
IEEE
154views VLSI» more  GLVLSI 2007»
14 years 1 months ago
A design kit for a fully working shared memory multiprocessor on FPGA
This paper presents a framework to design a shared memory multiprocessor on a programmable platform. We propose a complete flow, composed by a programming model and a template ar...
Antonino Tumeo, Matteo Monchiero, Gianluca Palermo...
VLSID
2003
IEEE
183views VLSI» more  VLSID 2003»
14 years 8 months ago
Interconnect Delay Minimization Using a Novel Pre-Mid-Post Buffer Strategy
We consider the problem of minimizing the delay in transporting a signal across a distance in a VLSI circuit.The problem can be restated as a combined buffer insertion, buffer siz...
Vani Prasad, Madhav P. Desai
VLSID
1999
IEEE
101views VLSI» more  VLSID 1999»
13 years 12 months ago
Formal System Design Based on the Synchrony Hypothesis, Functional Models and Skeletons
Formal approaches to HW and system design have not been generally adopted, because designers often view the modelling concepts in these approaches as unsuitable for their problems...
Ingo Sander, Axel Jantsch
VLSID
2010
IEEE
179views VLSI» more  VLSID 2010»
13 years 11 months ago
A Non Quasi-static Small Signal Model for Long Channel Symmetric DG MOSFET
—We propose a compact model for small signal non quasi static analysis of long channel symmetric double gate MOSFET. The model is based on the EKV formalism and is valid in all r...
Sudipta Sarkar, Ananda S. Roy, Santanu Mahapatra
DATE
2003
IEEE
101views Hardware» more  DATE 2003»
14 years 27 days ago
On Modeling Cross-Talk Faults
Circuit marginality failures in high performance VLSI circuits are projected to increase due to shrinking process geometries and high frequency design techniques. Capacitive cross...
Sujit T. Zachariah, Yi-Shing Chang, Sandip Kundu, ...