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FPGA
2004
ACM
117views FPGA» more  FPGA 2004»
14 years 1 months ago
A magnetoelectronic macrocell employing reconfigurable threshold logic
In this paper, we introduce a reconfigurable fabric based around a new class of circuit element: the hybrid Hall effect (HHE) magnetoelectronic device. Because they incorporate a ...
Steve Ferrera, Nicholas P. Carter
DAC
2005
ACM
13 years 9 months ago
Keeping hot chips cool
With 90nm CMOS in production and 65nm testing in progress, power has been pushed to the forefront of design metrics. This paper will outline practical techniques that are used to ...
Ruchir Puri, Leon Stok, Subhrajit Bhattacharya
ICCD
2003
IEEE
89views Hardware» more  ICCD 2003»
14 years 4 months ago
Precomputation-based Guarding for Dynamic and Leakage Power Reduction
- This paper presents a precomputation-based guarding technique to reduce both dynamic and static power consumptions in CMOS VLSI circuits. More precisely, a high threshold sleep t...
Afshin Abdollahi, Massoud Pedram, Farzan Fallah, I...
ICCAD
1994
IEEE
139views Hardware» more  ICCAD 1994»
13 years 11 months ago
Switching activity analysis considering spatiotemporal correlations
This work presents techniques for computing the switching activities of all circuit nodes under pseudorandom or biased input sequences and assuming a zero delay mode of operation....
Radu Marculescu, Diana Marculescu, Massoud Pedram
DAC
2002
ACM
14 years 8 months ago
Petri net modeling of gate and interconnect delays for power estimation
In this paper, a new type of Petri net called Hierarchical Colored Hardware Petri net, to model real-delay switching activity for power estimation is proposed. The logic circuit i...
Ashok K. Murugavel, N. Ranganathan