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» On the Execution of Deep Models
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VLSID
2002
IEEE
60views VLSI» more  VLSID 2002»
14 years 7 months ago
Transistor Flaring in Deep Submicron-Design Considerations
Abstract - The deep sub-micron regime has broughtup several manufacturing issues which impact circuit-performance and design. One such issue is flaring of transistors which causes ...
Vipul Singhal, C. B. Keshav, K. G. Surnanth, P. R....
ISPD
1998
ACM
88views Hardware» more  ISPD 1998»
13 years 11 months ago
An efficient technique for device and interconnect optimization in deep submicron designs
In this paper, we formulate a new class of optimization problem, named the general CH-posynomial program, and reveal the general dominance property. We propose an efcient algorith...
Jason Cong, Lei He
DATE
2006
IEEE
97views Hardware» more  DATE 2006»
13 years 10 months ago
Monolithic verification of deep pipelines with collapsed flushing
We introduce collapsed flushing, a new flushing-based refinement map for automatically verifying safety and liveness properties of term-level pipelined machine models. We also pre...
Roma Kane, Panagiotis Manolios, Sudarshan K. Srini...
ICML
2010
IEEE
13 years 7 months ago
Deep networks for robust visual recognition
Deep Belief Networks (DBNs) are hierarchical generative models which have been used successfully to model high dimensional visual data. However, they are not robust to common vari...
Yichuan Tang, Chris Eliasmith
CORR
2012
Springer
214views Education» more  CORR 2012»
12 years 2 months ago
Sum-Product Networks: A New Deep Architecture
The key limiting factor in graphical model inference and learning is the complexity of the partition function. We thus ask the question: what are the most general conditions under...
Hoifung Poon, Pedro Domingos