372 search results - page 72 / 75 » On the Fault Testing for Reversible Circuits |
FPGA
2010
ACM
14 years 1 months ago
2010
ACM
Triple Modular Redundancy (TMR) is a common reliability technique for mitigating single event upsets (SEUs) in FPGA designs operating in radiation environments. For FPGA systems t...
DATE
2008
IEEE
14 years 1 months ago
2008
IEEE
Circuit fabrics composed of highly regular structures, called logic bricks, have been described recently for improving yield. An automated logic brick design flow based on a SAT ...
IOLTS
2008
IEEE
14 years 1 months ago
2008
IEEE
— Error correcting coding is the dominant technique to achieve acceptable soft-error rates in memory arrays. In many modern circuits, the number of memory elements in the random ...
DATE
2006
IEEE
14 years 1 months ago
2006
IEEE
The problem of diagnosis – or locating the source of an error or fault – occurs in several areas of Computer Aided Design, such as dynamic verification, property checking, eq...
ITC
2003
IEEE
14 years 22 days ago
2003
IEEE
Diagnosing failing vectors in a Built-In Self Test (BIST) environment is a difficult task because of the highly compressed signature coming out of the Multiple Input Shift Regist...