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ISCA
1998
IEEE
13 years 12 months ago
1998
IEEE
Traditional graphics hardware architectures implement what we call the push architecture for texture mapping. Local memory is dedicated to the accelerator for fast local retrieval...
ISSS
1997
IEEE
13 years 12 months ago
1997
IEEE
Given a hardware/software partitioned specification and an allocation (number and type) of processors, we present an algorithm to (1) map each of the software behaviors (or tasks...
ICCD
2007
IEEE
14 years 4 months ago
2007
IEEE
In single processor architectures, computationallyintensive functions are typically accelerated using hardware accelerators, which exploit the concurrency in the function code to ...
ISCAS
2007
IEEE
14 years 1 months ago
2007
IEEE
Abstract— Several network security and QoS applications require detecting multiple string matches in the packet payload by comparing it against predefined pattern set. This proc...
DATE
2009
IEEE
14 years 2 months ago
2009
IEEE
Motion Estimation (ME) is the most computationally intensive part of video compression and video enhancement systems. For the recently available high definition frame sizes and hi...