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» On the Number of Birch Partitions
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ISSS
2002
IEEE
142views Hardware» more  ISSS 2002»
14 years 1 months ago
Energy/Power Estimation of Regular Processor Arrays
We propose a high-level analytical model for estimating the energy and/or power dissipation in VLSI processor (systolic) array implementations of loop programs, particularly for i...
Sanjay V. Rajopadhye, Steven Derrien
FPL
1998
Springer
107views Hardware» more  FPL 1998»
14 years 1 months ago
Modular Exponent Realization on FPGAs
The article describes modular exponent calculations used widely in cryptographic key exchange protocols. The measures for hardware consumption and execution speed based on argument...
Juri Põldre, Kalle Tammemäe, Marek Man...
EURODAC
1995
IEEE
159views VHDL» more  EURODAC 1995»
14 years 10 days ago
Performance-oriented placement and routing for field-programmable gate arrays
This paper presents a performance-oriented placement and routing tool for field-programmable gate arrays. Using recursive geometric partitioning for simultaneous placement and glo...
Michael J. Alexander, James P. Cohoon, Joseph L. G...
DSD
2006
IEEE
113views Hardware» more  DSD 2006»
13 years 10 months ago
Cascade Scheme for Concurrent Errors Detection
The paper deals with synthesis technique for designing circuits with cascade errors detection. The proposed technique is based on partitioning a scheme into a number of cascades f...
Ilya Levin, Vladimir Ostrovsky, Osnat Keren, Vladi...
AAAI
2004
13 years 10 months ago
Structured Duplicate Detection in External-Memory Graph Search
We consider how to use external memory, such as disk storage, to improve the scalability of heuristic search in statespace graphs. To limit the number of slow disk I/O operations,...
Rong Zhou, Eric A. Hansen