54 search results - page 8 / 11 » Optimal Clock Period for Synthesized Data Paths |
ISLPED
2007
ACM
13 years 10 months ago
2007
ACM
Negative bias temperature instability (NBTI) has become a dominant reliability concern for nanoscale PMOS transistors. In this paper, we propose variable-latency adder (VL-adder) ...
ASPDAC
2004
ACM
14 years 2 months ago
2004
ACM
— The problem of minimizing dynamic power consumption by scaling down the supply voltage of computational elements off critical paths is widely addressed in the literature for th...
ANCS
2008
ACM
13 years 10 months ago
2008
ACM
The significance of high-performance dedicated networks has been well recognized due to the rapidly increasing number of large-scale applications that require high-speed data tran...
CHES
2007
Springer
14 years 2 months ago
2007
Springer
Abstract. This paper presents a design-space exploration of the Galois/Counter Mode (GCM) algorithm with Advanced Encryption Standard (AES) as underlying block cipher for high thro...
DATE
2007
IEEE
14 years 2 months ago
2007
IEEE
The integration of microprocessors and field-programmable gate array (FPGA) fabric on a single chip increases both the utility and necessity of tools that automatically move softw...