106 search results - page 4 / 22 » Optimal Vector Selection for Low Power BIST |
VTS
1998
IEEE
13 years 12 months ago
1998
IEEE
This paper proposes an ATPG technique that reduces power dissipation during the test of sequential circuits. The proposed approach exploits some redundancy introduced during the t...
ETS
2007
IEEE
13 years 9 months ago
2007
IEEE
Software-Based Self-Test (SBST) has emerged as an effective strategy for on-line testing of processors integrated in non-safety critical embedded system applications. Among the mo...
ICCAD
1994
IEEE
13 years 11 months ago
1994
IEEE
Given a set of specifications for a targeted application, algorithm selection refers to choosing the most suitable algorithm for a given goal, among several functionally equivalen...
ISLPED
2003
ACM
14 years 27 days ago
2003
ACM
This paper proposes two very fast graph theoretic heuristics for the low power binding problem given fixed number of resources and multiple architectures for the resources. First...
EVOW
1999
Springer
13 years 12 months ago
1999
Springer
A technique is proposed to reduce the peak power consumption of sequential circuits during test pattern application. High-speed computation intensive VLSI systems, as telecommunica...