96 search results - page 3 / 20 » Optimization of Combinational Logic Circuits Based on Compat... |
ICCAD
2006
IEEE
14 years 4 months ago
2006
IEEE
An optimization algorithm for the design of combinational circuits that are robust to single-event upsets (SEUs) is described. A simple, highly accurate model for the SEU robustne...
ICCAD
2002
IEEE
14 years 4 months ago
2002
IEEE
Reversible, or information-lossless, circuits have applications in digital signal processing, communication, computer graphics and cryptography. They are also a fundamental requir...
GECCO
2009
Springer
14 years 8 days ago
2009
Springer
A non-uniform cellular automata-based model is presented for the evolutionary development of digital circuits at the gate level. The main feature of this model is the modified lo...
ISQED
2005
IEEE
14 years 1 months ago
2005
IEEE
As technology continues to scale beyond 100nm, there is a significant increase in performance uncertainty of CMOS logic due to process and environmental variations. Traditional c...
ICCAD
2005
IEEE
14 years 4 months ago
2005
IEEE
Separate optimizations of logic and layout have been thoroughly studied in the past and are well documented for common benchmarks. However, to be competitive, modern circuit optim...