208 search results - page 4 / 42 » Optimization of a Retargetable Functional Simulator for Embe... |
106
Voted
DATE
2007
IEEE
15 years 9 months ago
2007
IEEE
In this paper we research an FPGA based Application Specific Instruction Set Processor (ASIP) tailored to the needs of a flow aware Ethernet access node using a retargetable com...
116
Voted
DAC
1999
ACM
16 years 3 months ago
1999
ACM
We present a framework for rapidly exploring the design space of low power application-specific programmable processors (ASPP), in particular mediaprocessors. We focus on a catego...
115
Voted
CODES
2005
IEEE
15 years 8 months ago
2005
IEEE
In order to meet flexibility, performance and energy efficiency constraints, future SoC (System-on-Chip) designs will contain an increasing number of heterogeneous processor cor...
134
Voted
ICCAD
2003
IEEE
15 years 11 months ago
2003
IEEE
Transmitting compressed data can reduce inter-processor communication traffic and create new opportunities for DVS (dynamic voltage scaling) in distributed embedded systems. Howe...
161
Voted
CODES
2007
IEEE
15 years 9 months ago
2007
IEEE
Instruction Set Simulation (ISS) is widely used in system evaluation and software development for embedded processors. Despite the significant advancements in the ISS technology,...