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ARC
2007
Springer
169views Hardware» more  ARC 2007»
14 years 1 months ago
Designing Heterogeneous FPGAs with Multiple SBs
Abstract. The novel design of high-speed and low-energy FPGA routing architecture consisting of appropriate wire segments and multiple Switch Boxes is introduced. For that purpose,...
Kostas Siozios, Stelios Mamagkakis, Dimitrios Soud...
GLVLSI
2010
IEEE
164views VLSI» more  GLVLSI 2010»
14 years 14 days ago
Performance and energy trade-offs analysis of L2 on-chip cache architectures for embedded MPSoCs
On-chip memory organization is one of the most important aspects that can influence the overall system behavior in multiprocessor systems. Following the trend set by high-perform...
Mohamed M. Sabry, Martino Ruggiero, Pablo Garcia D...
DATE
2005
IEEE
122views Hardware» more  DATE 2005»
14 years 1 months ago
Resource Sharing and Pipelining in Coarse-Grained Reconfigurable Architecture for Domain-Specific Optimization
Coarse-grained reconfigurable architectures aim to achieve both goals of high performance and flexibility. However, existing reconfigurable array architectures require many resour...
Yoonjin Kim, Mary Kiemb, Chulsoo Park, Jinyong Jun...
VLSID
2005
IEEE
157views VLSI» more  VLSID 2005»
14 years 7 months ago
Energy Efficient Hardware Synthesis of Polynomial Expressions
Polynomial expressions are used to approximate a wide variety of functions commonly found in signal processing and computer graphics applications. Computing these polynomial expre...
Anup Hosangadi, Farzan Fallah, Ryan Kastner
ISCAS
1999
IEEE
113views Hardware» more  ISCAS 1999»
13 years 11 months ago
Energy efficient software through dynamic voltage scheduling
The energy usage of computer systems is becoming important, especially for portablebattery-operated applications and embedded systems. A significant reduction in the energy consum...
Gangadhar Konduri, James Goodman, Anantha Chandrak...