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» Optimizations for LTL Synthesis
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141
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DATE
1999
IEEE
162views Hardware» more  DATE 1999»
15 years 8 months ago
MOCSYN: Multiobjective Core-Based Single-Chip System Synthesis
In this paper, we present a system synthesis algorithm, called MOCSYN, which partitions and schedules embedded system specifications to intellectual property cores in an integrate...
Robert P. Dick, Niraj K. Jha
DAC
2009
ACM
16 years 5 months ago
Quality-driven synthesis of embedded multi-mode control systems
At runtime, an embedded control system can switch between alternative functional modes. In each mode, the system operates by using a schedule and controllers that exploit the avai...
Soheil Samii, Petru Eles, Zebo Peng, Anton Cervin
CAV
2009
Springer
155views Hardware» more  CAV 2009»
16 years 4 months ago
Better Quality in Synthesis through Quantitative Objectives
Abstract. Most specification languages express only qualitative constraints. However, among two implementations that satisfy a given specification, one may be preferred to another....
Roderick Bloem, Krishnendu Chatterjee, Thomas A. H...
ISLPED
2003
ACM
155views Hardware» more  ISLPED 2003»
15 years 9 months ago
Low-power high-level synthesis for FPGA architectures
This paper addresses two aspects of low-power design for FPGA circuits. First, we present an RT-level power estimator for FPGAs with consideration of wire length. The power estima...
Deming Chen, Jason Cong, Yiping Fan
DATE
2010
IEEE
140views Hardware» more  DATE 2010»
15 years 8 months ago
Construction of dual mode components for reconfiguration aware high-level synthesis
High-level synthesis has recently started to gain industrial acceptance, due to the improved quality of results and the multi-objective optimizations offered. One optimization area...
George Economakos, Sotirios Xydis, Ioannis Koutras...