2703 search results - page 183 / 541 » Optimizing memory transactions |
ICCAD
1995
IEEE
14 years 1 months ago
1995
IEEE
Abstract -- Telecommunication network management applications often require application-specific ICs that use large dynamically allocated stored data structures. Currently availab...
ASPDAC
2004
ACM
14 years 3 months ago
2004
ACM
— For multimedia applications, loop buffering is an efficient mechanism to reduce the power in the instruction memory of embedded processors. In particular, software controlled ...
DATE
2009
IEEE
14 years 4 months ago
2009
IEEE
Abstract—Convergence of communication, consumer applications and computing within mobile systems pushes memory requirements both in terms of size, bandwidth and power consumption...
PVM
2009
Springer
14 years 4 months ago
2009
Springer
Abstract. Most parallel systems on which MPI is used are now hierarchical: some processors are much closer to others in terms of interconnect performance. One of the most common su...
DATE
2006
IEEE
14 years 4 months ago
2006
IEEE
Built-in self-repair (BISR) technique is gaining popular for repairing embedded memory cores in system-onchips (SOCs). To increase the utilization of memory redundancy, the BISR t...