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DAC
2002
ACM
14 years 8 months ago
Communication architecture based power management for battery efficient system design
Communication-based power management (CBPM) is a new batterydriven system-level power management methodology in which the systemlevel communication architecture regulates the exec...
Kanishka Lahiri, Sujit Dey, Anand Raghunathan
DATE
2004
IEEE
146views Hardware» more  DATE 2004»
13 years 11 months ago
Analyzing On-Chip Communication in a MPSoC Environment
This work focuses on communication architecture analysis for multi-processor Systems-on-Chips (MPSoCs), and it leverages a SystemC-based platform to simulate a complete multi-proc...
Mirko Loghi, Federico Angiolini, Davide Bertozzi, ...
3DIC
2009
IEEE
169views Hardware» more  3DIC 2009»
14 years 24 days ago
3-D memory organization and performance analysis for multi-processor network-on-chip architecture
Several forms of processor memory organizations have been in use to optimally access off-chip memory systems mainly the Hard disk drives (HDD). Recent trends show that the solid s...
Awet Yemane Weldezion, Zhonghai Lu, Roshan Weerase...
SAC
2005
ACM
14 years 1 months ago
Performance analysis framework for large software-intensive systems with a message passing paradigm
The launch of new features for mobile phones is increasing and the product life cycle symmetrically decreasing in duration as higher levels of sophistication are reached. Therefor...
Christian Del Rosso
CODES
2004
IEEE
13 years 11 months ago
Power analysis of system-level on-chip communication architectures
For complex System-on-chips (SoCs) fabricated in nanometer technologies, the system-level on-chip communication architecture is emerging as a significant source of power consumpti...
Kanishka Lahiri, Anand Raghunathan