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ICCAD
2006
IEEE
125views Hardware» more  ICCAD 2006»
14 years 5 months ago
Leveraging protocol knowledge in slack matching
Stalls, due to mis-matches in communication rates, are a major performance obstacle in pipelined circuits. If the rate of data production is faster than the rate of consumption, t...
Girish Venkataramani, Seth Copen Goldstein
ARITH
2007
IEEE
14 years 2 months ago
Optimistic Parallelization of Floating-Point Accumulation
Abstract— Floating-point arithmetic is notoriously nonassociative due to the limited precision representation which demands intermediate values be rounded to fit in the availabl...
Nachiket Kapre, André DeHon
CASES
2006
ACM
13 years 11 months ago
Reaching fast code faster: using modeling for efficient software thread integration on a VLIW DSP
When integrating software threads together to boost performance on a processor with instruction-level parallel processing support, it is rarely clear which code regions should be ...
Won So, Alexander G. Dean
VLSID
2006
IEEE
144views VLSI» more  VLSID 2006»
14 years 8 months ago
A High-Performance VLSI Architecture for Advanced Encryption Standard (AES) Algorithm
In this paper we present a high-performance, high throughput, and area efficient architecture for the VLSI implementation of the AES algorithm. The subkeys, required for each round...
Naga M. Kosaraju, Murali R. Varanasi, Saraju P. Mo...
FCCM
2006
IEEE
268views VLSI» more  FCCM 2006»
14 years 2 months ago
Sparse Matrix-Vector Multiplication for Finite Element Method Matrices on FPGAs
We present an architecture and an implementation of an FPGA-based sparse matrix-vector multiplier (SMVM) for use in the iterative solution of large, sparse systems of equations ar...
Yousef El-Kurdi, Warren J. Gross, Dennis Giannacop...