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» Power Optimization of Variable Voltage Core-Based Systems
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ISLPED
2004
ACM
139views Hardware» more  ISLPED 2004»
14 years 1 months ago
Eliminating voltage emergencies via microarchitectural voltage control feedback and dynamic optimization
Microprocessor designers use techniques such as clock gating to reduce power dissipation. An unfortunate side-effect of these techniques is the processor current fluctuations th...
Kim M. Hazelwood, David Brooks
ISQED
2008
IEEE
186views Hardware» more  ISQED 2008»
14 years 2 months ago
Reliability-Aware Optimization for DVS-Enabled Real-Time Embedded Systems
—Power and energy consumption has emerged as the premier and most constraining aspect in modern computational systems. Dynamic Voltage Scheduling (DVS) has been provably one of t...
Foad Dabiri, Navid Amini, Mahsan Rofouei, Majid Sa...
TVLSI
2010
13 years 2 months ago
Dynamic and Leakage Energy Minimization With Soft Real-Time Loop Scheduling and Voltage Assignment
With the shrinking of technology feature sizes, the share of leakage in total power consumption of digital systems continues to grow. Traditional dynamic voltage scaling (DVS) fail...
Meikang Qiu, Laurence Tianruo Yang, Zili Shao, Edw...
ISCAS
2007
IEEE
91views Hardware» more  ISCAS 2007»
14 years 1 months ago
Fundamental Performance Limits in Lossy Polyphase Systems: Apparent Power and Optimal Compensation
— The paper formulates and solves the problem of optimizing power flows in polyphase systems with significant source (line) impedance. We present two fundamental performance bo...
Hanoch Lev-Ari, Alex M. Stankovic
ISCA
2008
IEEE
135views Hardware» more  ISCA 2008»
14 years 2 months ago
ReVIVaL: A Variation-Tolerant Architecture Using Voltage Interpolation and Variable Latency
Process variations are poised to significantly degrade performance benefits sought by moving to the next nanoscale technology node. Parameter fluctuations in devices can introd...
Xiaoyao Liang, Gu-Yeon Wei, David Brooks