734 search results - page 16 / 147 » Power balanced pipelines |
ICCD
2006
IEEE
14 years 5 months ago
2006
IEEE
— In this paper, we present two designs for CMOS comparators: one which is targeted for high-speed applications and another for low-power applications. Additionally, we present h...
ISLPED
2006
ACM
14 years 2 months ago
2006
ACM
As transistors continue to scale down into the nanometer regime, device leakage currents are becoming the dominant cause of power dissipation in nanometer caches, making it essent...
IWNAS
2008
IEEE
14 years 3 months ago
2008
IEEE
Data streaming applications, usually composed with sequential/parallel tasks in a data pipeline form, bring new challenges to task scheduling and resource allocation in grid envir...
ICCAD
2001
IEEE
14 years 5 months ago
2001
IEEE
In this paper we describe a software pipelining framework, CALiBeR (Cluster Aware Load Balancing Retiming Algorithm), suitable for compilers targeting clustered embedded VLIW proc...
SIGARCH
2008
13 years 8 months ago
2008
Multiprocessors-on-chip, such as the Cell BE processor, regularly suffer from restricted bandwidth to off-chip main memory. We propose to reduce memory bandwidth requirements, and...