121 search results - page 8 / 25 » Power distribution techniques for dual VDD circuits |
ASPDAC
2009
ACM
14 years 2 months ago
2009
ACM
— Negative Bias Temperature Instability (NBTI) in PMOS transistors has become a major reliability concern in present-day digital circuit design. Further, with the recent usage of...
DAC
2005
ACM
14 years 8 months ago
2005
ACM
- The large magnitude of supply/ground bounces, which arise from power mode transitions in power gating structures, may cause spurious transitions in a circuit. This can result in ...
ISLPED
1996
ACM
13 years 11 months ago
1996
ACM
In this paper, we present a new statistical technique for estimation of average power dissipation in digital circuits. Present statistical techniques estimate the average power ba...
VLSID
2002
IEEE
14 years 7 months ago
2002
IEEE
Critical issues in designing a high speed, low power static RAM in deep submicron technologies are described along with the design techniques used to overcome them. With appropria...
DATE
2006
IEEE
14 years 1 months ago
2006
IEEE
: This paper presents a domain decomposition (DD) technique for efficient simulation of large-scale linear circuits such as power distribution networks. Simulation results show th...