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ISPASS
2007
IEEE
14 years 2 months ago
An Analysis of Microarchitecture Vulnerability to Soft Errors on Simultaneous Multithreaded Architectures
Semiconductor transient faults (i.e. soft errors) have become an increasingly important threat to microprocessor reliability. Simultaneous multithreaded (SMT) architectures exploi...
Wangyuan Zhang, Xin Fu, Tao Li, José A. B. ...
ICCD
2008
IEEE
165views Hardware» more  ICCD 2008»
14 years 4 months ago
Analysis and minimization of practical energy in 45nm subthreshold logic circuits
Abstract— Over the last decade, the design of ultra-lowpower digital circuits in subthreshold regime has been driven by the quest for minimum energy per operation. In this contri...
David Bol, Renaud Ambroise, Denis Flandre, Jean-Di...
GLVLSI
2010
IEEE
164views VLSI» more  GLVLSI 2010»
14 years 23 days ago
Performance and energy trade-offs analysis of L2 on-chip cache architectures for embedded MPSoCs
On-chip memory organization is one of the most important aspects that can influence the overall system behavior in multiprocessor systems. Following the trend set by high-perform...
Mohamed M. Sabry, Martino Ruggiero, Pablo Garcia D...
LSGRID
2004
Springer
14 years 1 months ago
Distributed Cell Biology Simulations with E-Cell System
Many useful applications of simulation in computational cell biology, e.g. kinetic parameter estimation, Metabolic Control Analysis (MCA), and bifurcation analysis, require a large...
Masahiro Sugimoto, Kouichi Takahashi, Tomoya Kitay...
IPPS
1999
IEEE
13 years 12 months ago
Cascaded Execution: Speeding Up Unparallelized Execution on Shared-Memory Multiprocessors
Both inherently sequential code and limitations of analysis techniques prevent full parallelization of many applications by parallelizing compilers. Amdahl's Law tells us tha...
Ruth E. Anderson, Thu D. Nguyen, John Zahorjan