We consider a switch module routing problem for symmetric array FPGAs. The work is motivated by two applications. The rst is that of eciently evaluating switch module designs [8]...
Creating a new FPGA is a challenging undertaking because of the significant effort that must be spent on circuit design, layout and verification. It currently takes approximately ...
The sustained progress of VLSI technology has altered the landscape of routing which is a major physical design stage. For timing driven routings, traditional approaches which con...
A simple extension of the critical path method is presented which allows more accurate optimization of circuits with level-sensitive latches. The extended formulation provides a s...
—The clock distribution network is a key component of any synchronous VLSI design. High power dissipation and pressure volume temperature-induced variations in clock skew have st...
Ganesh Venkataraman, Jiang Hu, Frank Liu, Cliff C....