Sciweavers

85 search results - page 13 / 17
» Practical placement and routing techniques for analog circui...
Sort
View
EURODAC
1994
IEEE
186views VHDL» more  EURODAC 1994»
13 years 11 months ago
Algorithms for a switch module routing problem
We consider a switch module routing problem for symmetric array FPGAs. The work is motivated by two applications. The rst is that of eciently evaluating switch module designs [8]...
Shashidhar Thakur, D. F. Wong, S. Muthukrishnan
FPGA
2005
ACM
215views FPGA» more  FPGA 2005»
14 years 18 days ago
Design, layout and verification of an FPGA using automated tools
Creating a new FPGA is a challenging undertaking because of the significant effort that must be spent on circuit design, layout and verification. It currently takes approximately ...
Ian Kuon, Aaron Egier, Jonathan Rose
ISPD
2005
ACM
205views Hardware» more  ISPD 2005»
14 years 19 days ago
Coupling aware timing optimization and antenna avoidance in layer assignment
The sustained progress of VLSI technology has altered the landscape of routing which is a major physical design stage. For timing driven routings, traditional approaches which con...
Di Wu, Jiang Hu, Rabi N. Mahapatra
ICCAD
1994
IEEE
117views Hardware» more  ICCAD 1994»
13 years 11 months ago
Optimization of critical paths in circuits with level-sensitive latches
A simple extension of the critical path method is presented which allows more accurate optimization of circuits with level-sensitive latches. The extended formulation provides a s...
Timothy M. Burks, Karem A. Sakallah
DATE
2006
IEEE
104views Hardware» more  DATE 2006»
14 years 1 months ago
Integrated placement and skew optimization for rotary clocking
—The clock distribution network is a key component of any synchronous VLSI design. High power dissipation and pressure volume temperature-induced variations in clock skew have st...
Ganesh Venkataraman, Jiang Hu, Frank Liu, Cliff C....