SSTA has received a considerable amount of attention in recent years. However, it is a general rule that any approach can only be as accurate as the underlying models. Thus, varia...
Brian Cline, Kaviraj Chopra, David Blaauw, Andres ...
Abstract--To achieve a high product quality for nano-scale systems both realistic defect mechanisms and process variations must be taken into account. While existing approaches for...
As the VLSI technology marches beyond 65 and 45nm process technologies, variation in gate length has a direct impact on leakage and performance of CMOS transistors. Due to sub-wav...
The impact of process variation in state of the art technology makes traditional (worst case) designs unnecessarily pessimistic, which translates to suboptimal designs in terms of...
The threshold voltage (Vth) of a nanoscale transistor is severely affected by random dopant fluctuations and line-edge roughness. The analysis of these effects usually requires at...