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» Quasi-Resonant Interconnects: A Low Power Design Methodology
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ISQED
2009
IEEE
106views Hardware» more  ISQED 2009»
14 years 2 months ago
Design and application of multimodal power gating structures
- Designing a power-gating structure with high performance in the active mode and low leakage and short wakeup time during standby mode is an important and challenging task. This p...
Ehsan Pakbaznia, Massoud Pedram
ISQED
2008
IEEE
103views Hardware» more  ISQED 2008»
14 years 2 months ago
Process Variation Characterization and Modeling of Nanoparticle Interconnects for Foldable Electronics
— Designers require variational information for robust designs. Characterization of such information can be costly for the novel nanoparticle interconnect process, which utilize ...
Rasit Onur Topaloglu
HPCA
2005
IEEE
14 years 1 months ago
Microarchitectural Wire Management for Performance and Power in Partitioned Architectures
Future high-performance billion-transistor processors are likely to employ partitioned architectures to achieve high clock speeds, high parallelism, low design complexity, and low...
Rajeev Balasubramonian, Naveen Muralimanohar, Kart...
ISPD
2010
ACM
160views Hardware» more  ISPD 2010»
14 years 2 months ago
Physical synthesis of bus matrix for high bandwidth low power on-chip communications
As the thermal wall becomes the dominant factor limiting VLSI circuit performance, and the interconnect wires become the primary power consumer, power efficiency of onchip data th...
Renshen Wang, Evangeline F. Y. Young, Ronald L. Gr...
DAC
2000
ACM
14 years 8 months ago
Code compression for low power embedded system design
erse approaches at all levels of abstraction starting from the physical level up to the system level. Experience shows that a highlevel method may have a larger impact since the de...
Haris Lekatsas, Jörg Henkel, Wayne Wolf