174 search results - page 23 / 35 » Reclocking for high-level synthesis |
DAC
2008
ACM
14 years 8 months ago
2008
ACM
This paper addresses the problem of computational error modeling and analysis. Choosing different word-lengths for each functional unit in hardware implementations of numerical al...
ICCD
2005
IEEE
14 years 4 months ago
2005
IEEE
Presently, Architecture Description Languages (ADLs) are widely used to raise the abstraction level of the design space exploration of Application Specific Instruction-set Proces...
DAC
2010
ACM
13 years 6 months ago
2010
ACM
As high-level models in C and SystemC are increasingly used for verification and even design (through high-level synthesis) of electronic systems, there is a growing need for com...
DATE
2003
IEEE
14 years 23 days ago
2003
IEEE
System level synthesis is widely seen as the solution for closing the productivity gap in system design. High level system models are used in system level design for early design ...
VLSID
2003
IEEE
14 years 7 months ago
2003
IEEE
Design of efficient System-on-Chips (SoCs) require thorough application analysis to identify various compute intensive parts. These compute intensive parts can be mapped to hardwa...