156 search results - page 1 / 32 » Reconfigurable Architectures and Instruction Sets: Programma... |
DAGSTUHL
2006
14 years 7 days ago
2006
Abstract. Within Self-reconfiguring systems two basic problems arise: on instruction level, reconfigurable instruction sets make program generation and execution inherently difficu...
ASPDAC
2007
ACM
14 years 2 months ago
2007
ACM
- This paper presents a real time programmable irregular Low Density Parity Check (LDPC) Encoder as specified in the IEEE P802.16E/D7 standard. The encoder is programmable for fram...
DAC
2004
ACM
14 years 4 months ago
2004
ACM
Silicon compilers are often used in conjunction with Field Programmable Gate Arrays (FPGAs) to deliver flexibility, fast prototyping, and accelerated time-to-market. Many of these...
VLSID
2002
IEEE
14 years 11 months ago
2002
IEEE
This paper shows that software pipelining can be an effective technique for code generation for coarse-grained reconfigurable instruction set processors. The paper describes a tec...
CSSE
2008
IEEE
14 years 5 months ago
2008
IEEE
Instruction-Set Simulators (ISS) are indispensable tools for studying new architectures. There are several alternatives to achieve instruction set simulation, such as interpretive...