Sciweavers

387 search results - page 5 / 78
» Reducing the Costs of Bounded-Exhaustive Testing
Sort
View
DATE
2009
IEEE
93views Hardware» more  DATE 2009»
14 years 2 months ago
Test cost reduction for multiple-voltage designs with bridge defects through Gate-Sizing
Abstract—Multiple-voltage is an effective dynamic power reduction design technique. Recent research has shown that testing for resistive bridging faults in such designs requires ...
S. Saqib Khursheed, Bashir M. Al-Hashimi, Peter Ha...
ET
2002
64views more  ET 2002»
13 years 7 months ago
Structural Fault Based Specification Reduction for Testing Analog Circuits
Specification reduction can reduce test time, consequently, test cost. In this paper, a methodology to reduce specifications during specification testing for analog circuit is prop...
Soon-Jyh Chang, Chung-Len Lee, Jwu E. Chen
DATE
2006
IEEE
82views Hardware» more  DATE 2006»
14 years 1 months ago
Concurrent core test for SOC using shared test set and scan chain disable
A concurrent core test approach is proposed to reduce the test cost of SOC. Multiple cores in SOC can be tested simultaneously by using a shared test set and scan chain disable. P...
Gang Zeng, Hideo Ito
ICCD
2004
IEEE
106views Hardware» more  ICCD 2004»
14 years 4 months ago
Extending the Applicability of Parallel-Serial Scan Designs
Although scan-based designs are widely used in order to reduce the complexity of test generation, test application time and test data volume are substantially increased. We propos...
Baris Arslan, Ozgur Sinanoglu, Alex Orailoglu
TIM
2011
183views more  TIM 2011»
13 years 2 months ago
Calibration and Field Deployment of Low-Cost Fluid Flow-Rate Sensors Using a Wireless Network
—Low-cost networked fluid flow velocity sensors are needed for high-density sampling in environmental research and other applications requiring automated fluid flow velocity mapp...
C. K. Harnett, M. T. Schueler, N. R. Blumenthal, K...