73 search results - page 12 / 15 » Reduction of interpolants for logic synthesis |
GPCE
2008
Springer
13 years 8 months ago
2008
Springer
A user interface, such as a dialog, assists a user in synthesising a set of values, typically parameters for a command object. Code for “command parameter synthesis” is usuall...
ICCAD
2010
IEEE
13 years 5 months ago
2010
IEEE
Boolean matching for multiple-output functions determines whether two given (in)completely-specified function vectors can be identical to each other under permutation and/or negat...
ICCAD
2005
IEEE
14 years 4 months ago
2005
IEEE
The increasing variability of process parameters leads to substantial parametric yield losses due to timing and leakage power constraints. Leakage power is especially affected by ...
ICCAD
2004
IEEE
14 years 4 months ago
2004
IEEE
— This paper presents two contributions. The first is an incremental placement algorithm for placement-aware logic synthesis along with a proof of optimality. The algorithm can ...
ICCAD
2008
IEEE
14 years 4 months ago
2008
IEEE
Functional decomposition is a fundamental operation in logic synthesis. Prior BDD-based approaches to functional decomposition suffer from the memory explosion problem and do not...