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HPCA
2008
IEEE
14 years 10 months ago
Gaining insights into multicore cache partitioning: Bridging the gap between simulation and real systems
Cache partitioning and sharing is critical to the effective utilization of multicore processors. However, almost all existing studies have been evaluated by simulation that often ...
Jiang Lin, Qingda Lu, Xiaoning Ding, Zhao Zhang, X...
ATVA
2007
Springer
115views Hardware» more  ATVA 2007»
14 years 4 months ago
A Compositional Semantics for Dynamic Fault Trees in Terms of Interactive Markov Chains
Abstract. Dynamic fault trees (DFTs) are a versatile and common formalism to model and analyze the reliability of computer-based systems. This paper presents a formal semantics of ...
Hichem Boudali, Pepijn Crouzen, Mariëlle Stoe...
IESS
2007
Springer
92views Hardware» more  IESS 2007»
14 years 4 months ago
An Interactive Model Re-Coder for Efficient SoC Specification
To overcome the complexity in System-on-Chip (SoC) design, researchers have developed sophisticated design flows that significantly reduce the development time through automation...
Pramod Chandraiah, Rainer Dömer
ASPDAC
2009
ACM
161views Hardware» more  ASPDAC 2009»
14 years 4 months ago
Risk aversion min-period retiming under process variations
— Recent advances in statistical timing analysis (SSTA) achieve great success in computing arrival times under variations by extending sum and maximum operations to random variab...
Jia Wang, Hai Zhou
CODES
2007
IEEE
14 years 4 months ago
Ensuring secure program execution in multiprocessor embedded systems: a case study
Multiprocessor SoCs are increasingly deployed in embedded systems with little or no security features built in. Code Injection attacks are one of the most commonly encountered sec...
Krutartha Patel, Sridevan Parameswaran, Seng Lin S...