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» Robustness of Sequential Circuits
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ITC
1989
IEEE
70views Hardware» more  ITC 1989»
14 years 19 days ago
The Pseudo-Exhaustive Test of Sequential Circuits
: The concept of a pseudo-exhaustive test for sequential circuits is introduced in a similar way as it is used for combinational networks. Instead of test sets one has to apply pse...
Sybille Hellebrand, Hans-Joachim Wunderlich
ICCAD
2001
IEEE
180views Hardware» more  ICCAD 2001»
14 years 5 months ago
On the Optimization Power of Redundancy Addition and Removal Techniques for Sequential Circuits
This paper attempts to determine the capabilities of existing Redundancy Addition and Removal (SRAR) techniques for logic optimization of sequential circuits. To this purpose, we ...
Enrique San Millán, Luis Entrena, Jos&eacut...
ICCAD
1998
IEEE
122views Hardware» more  ICCAD 1998»
14 years 25 days ago
Dynamic fault collapsing and diagnostic test pattern generation for sequential circuits
In this paper, we present results for significantly improving the performance of sequential circuit diagnostic test pattern generation (DATPG). Our improvements are achieved by de...
Vamsi Boppana, W. Kent Fuchs
DATE
1997
IEEE
109views Hardware» more  DATE 1997»
14 years 4 days ago
Sequential circuit test generation using dynamic state traversal
A new method for state justi cation is proposed for sequential circuit test generation. The linear list of states dynamically obtained during the derivation of test vectors is use...
Michael S. Hsiao, Elizabeth M. Rudnick, Janak H. P...
ISLPED
2003
ACM
85views Hardware» more  ISLPED 2003»
14 years 1 months ago
ILP-based optimization of sequential circuits for low power
The power consumption of a sequential circuit can be reduced by decomposing it into subcircuits which can be turned off when inactive. Power can also be reduced by careful state e...
Feng Gao, John P. Hayes